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Hardware description languages
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#	Item
311	White Paper: Virtex-7 FPGAs WP387 (v1.0) February 16, 2011 Add to Reading List Source URL: xilinx.eetrend.com Language: English - Date: 2011-06-21 23:25:29 Fabless semiconductor companies Hardware description languages Xilinx Field-programmable gate array Electronic design automation Integrated circuits High-level synthesis VHDL CPU design Electronic engineering Electronics Reconfigurable computing
312	ABEL-HDL Reference Manual Version 7.0 Add to Reading List Source URL: www.ue.eti.pg.gda.pl Language: English - Date: 2003-11-27 21:36:25 Digital electronics Advanced Boolean Expression Language Verilog VHDL Application-specific integrated circuit Joint Test Action Group Electronic engineering Hardware description languages Electronics
313	DVCon-2012_What-is-new-in-SystemVerilog-2012.fm Add to Reading List Source URL: www.sutherland-hdl.com Language: English - Date: 2012-11-02 18:47:29 Hardware description languages SystemVerilog Verilog Universal Verification Methodology E SV Integrated circuit design Generic programming Type system Electronic engineering Hardware verification languages Electronic design automation
314	Fault-tolerant Microprocessors for Space Applications 5 Add to Reading List Source URL: www.gaisler.com Language: English - Date: 2012-07-17 10:32:05 VHDL Verilog LEON Parallel computing Digital electronics Sequential logic Dataflow Flip-flop SIGNAL Electronic engineering Hardware description languages Electronics
315	Synopsys MAP-in Program Update Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 11:17:24 Electronics Hillsboro Oregon Synopsys EDA database Tcl VHDL Verilog GDSII Electronic engineering Electronic design automation Hardware description languages
316	Verilog Wires and Registers 4-valued Logic Add to Reading List Source URL: www.engineering.uiowa.edu Language: English - Date: 2006-03-22 10:50:51 Wire Hardware description languages Electronic engineering Verilog
317	Verilog - Modules The module is the basic unit of hierarchy in Verilog Modules describe: Add to Reading List Source URL: web.engr.oregonstate.edu Language: English - Date: 2012-04-09 12:48:28 Verilog E Adder Modularity XOR gate Verilog-AMS SystemVerilog Electronic engineering Hardware description languages Hardware verification languages
318	VHDL for Simulation and Synthesis Sabih H. Gerez University of Twente Add to Reading List Source URL: wwwhome.ewi.utwente.nl Language: English Hardware description languages Logic design Electronic design VHDL Field-programmable gate array Verilog High-level synthesis Logic synthesis Standard cell Electronic engineering Digital electronics Electronic design automation
319	System Level Design Using the SystemC Modeling Platform 1 Joachim Gerlach, University of Tübingen, Germany [removed] Add to Reading List Source URL: www.ee.ryerson.ca Language: English - Date: 2004-01-08 11:59:32 Hardware verification languages SystemC Transaction-level modeling Catapult C Electronic engineering Electronic design automation Hardware description languages
320	D e p a r t m e n t o f Add to Reading List Source URL: mini.li.ttu.ee Language: English - Date: 2013-09-04 12:50:07 IEEE MyHDL Hardware description languages Electronic engineering VHDL

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